signal protection
26.1 JTAG interface electrostatic protection scheme 5V
Generally, the program download interface adopted by FPGA/ARM is the JTAG interface. The JTAG interface is often used as a class of download
The interface of the program, and it is also a kind of interface that is often plugged and unplugged, and unplugging and plugging will inevitably produce some
Static electricity or surge current, so if you do not take some protective measures, it is easy to break down JTAG due to ESD electrostatic discharge
related pins, and even damage the core circuit inside the CPU, causing permanent damage to the internal circuit.
Advantages of the solution: integrated device protection can ensure signal integrity and pass the static electricity test at the same time. Full
Foot: IEC61000-4-2, contact discharge 30kV, air discharge 30kV.
